ISSNIP

Event Name IEEE SP Seminar by Dr. Chris Dick on FPGA implementation of a near-ML sphere detector for 3G LTE and 802.16e broadband wireless systems
Start Date 29th Mar 2010 6:00pm
End Date
Duration N/A
Description

Title: FPGA implementation of a near-ML sphere detector for 3G LTE and 802.16e broadband wireless systems [pdf]

Speaker: Dr. Chris Dick

Time and Date: 6:00pm refreshments for, 6:30pm start, Monday, 29 March 2010

Place: Auditorium, Engineers Australia Building, 21 Bedford Street, North Melbourne

Abstract:

Spatial multiplexing multiple-input-multiple-output (MIMO) communication systems have recently drawn significant attention as a means to achieve tremendous gains in wireless system capacity and link reliability. The optimal hard decision detection for MIMO wireless systems is the maximum likelihood (ML) detector. ML detection is attractive due to its superior performance (in terms of BER). However, direct implementation grows exponentially with the number of antennas and the modulation scheme, making its ASIC or FPGA implementation infeasible for all but low density modulation schemes using a small number of antennas. Sphere decoding (SD) solves the ML detection problem in a computationally efficient manner. However, even with this complexity reduction, real-time implementation on a DSP processor is generally not feasible and high-performance parallel computing platforms such as FPGAs are increasingly being employed for this class of applications. The sphere detection problem affords many opportunities for algorithm and micro-architecture optimizations and tradeoffs. This presentation provides an overview of an FPGA implementation of a near-ML sphere detector and a successive interference cancellation-based channel matrix pre-processor applicable to the 802.16e and 3G LTE air interface protocols. The architecture of the design is presented along with resource utilization data and BER performance curves.

Brief Bio:

Dr Chris Dick is the DSP Chief Scientist at Xilinx and the engineering manager for the Xilinx Wireless Systems Engineering team. Chris has worked with signal processing technology for two decades and his work has spanned the commercial, military and academic sectors. Prior to joining Xilinx in 1997 he was a professor at La Trobe University, Melbourne, Australia for 13 year. Chris' work and research interests are in the areas of fast algorithms for signal processing, digital communication, MIMO, OFDM, software defined radios, VLSI architectures for DSP, adaptive signal processing, synchronization, hardware architectures for real-time signal processing, and the use of Field Programmable Arrays (FPGAs) for custom computing machines and real-time signal processing. In addition to his role at Xilinx, Chris teaches FPGA Signal processing classes at Santa Clara University where he is an adjunct professor. He is also an adjunct professor at Rice University. He holds a bachelor’s and PhD degrees in the areas of computer science and electronic engineering.

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